Staff Analog IC Layout Engineer (Block & Chip)

 As a Staff Analog Layout Engineer, you will take technical ownership of the physical layout and verification of complex analog and mixed-signal integrated circuits for the ATE market. You will work across both block-level and full-chip layout using advanced process technologies ranging from 65nm CMOS to 100+V BCD.

This role offers the opportunity to solve complex layout challenges, collaborate closely with analog design engineers, and influence layout strategy across projects. You will apply your expertise in matching, parasitics, reliability, and manufacturability while helping establish best practices and drive designs through successful tapeout.

Responsibilities

• Perform physical layout of analog and mixed-signal integrated circuits at both the block and full-chip level
• Develop floorplans and optimize component placement for area, performance, and power
• Perform LVS and DRC verification to ensure layout accuracy and compliance with process design rules
• Collaborate closely with design engineers to translate circuit requirements into high-quality physical layouts
• Partner with digital design, packaging, and other cross-functional teams to optimize overall chip performance
• Troubleshoot and resolve layout, verification, and manufacturability issues

Requirements

• Bachelor’s degree in Electrical Engineering or a related field
• Minimum of 8 years of