Senior Engineer – ASIC Verification (m/f/d)

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Job Description:

We are seeking a talented and experienced Senior ASIC Verification Engineer to join our engineering team in Dresden. In this role, you will develop and execute verification strategies for complex digital designs, ensuring that our products meet the highest standards of quality, functionality, and reliability.

You will work closely with RTL design, architecture, software, and other cross-functional teams throughout the product development lifecycle. The ideal candidate will have strong hands-on experience with modern verification methodologies and the ability to take ownership of verification activities from planning through execution and sign-off.

Key Responsibilities:

• Develop, implement, and maintain verification plans, methodologies, and environments for complex digital designs.

• Collaborate with RTL design, architecture, and software teams worldwide to define verification requirements and resolve technical issues.

• Develop and maintain reusable, scalable, and efficient verification environments.

• Debug and analyze simulation failures, identify root causes, and work with design teams to implement corrective actions.

• Drive the adoption of advanced verification techniques, including UVM, constrained-random verification and assertion-based verification methods where appropriate.

• Define, track, and report functional and code coverage metrics to ensure thorough validation of design functionality.

• Review verification deliverables, including verification plans, test cases, regression results, coverage reports, and sign-off documentation.

• Participate in design and architecture reviews, providing expert feedback on testability, observability, and verification coverage.

• Mentor junior engineers and provide technical guidance on verification methodologies, tools, and best practices.

• Communicate project status, technical risks, verification results, and recommendations to relevant stakeholders.

Requirements/Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field, or equivalent professional experience.

• At least 5 years of professional experience in ASIC, SoC, or semiconductor design verification.

• Strong hands-on experience with SystemVerilog, UVM, SystemVerilog Assertions (SVA), constrained-random verification, and functional coverage.

• Experience with simulation and debugging tools such as Synopsys VCS, Cadence Xcelium, or Siemens Questa.

• Experience developing verification automation using scripting languages such as Python, Perl, or Tcl.

• Familiarity with gate-level simulation (GLS) is a plus.

• Proven ability to work collaboratively in a fast-paced, cross-functional, and international environment.

• Experience mentoring junior engineers and contributing to the development of engineering talent.

• Excellent problem-solving, analytical, and debugging skills.

• Excellent written and verbal communication skills in English.

• Candidates must have the legal right to work in Germany by their start date. Visa sponsorship is not available for this position.

• Willingness to work onsite in Dresden, Germany.

Preferred Qualifications:

• Experience with mixed-signal or analog/mixed-signal verification.

• Knowledge of industry standards and protocols such as PCIe, Ethernet, USB, or similar interfaces.

• Experience in safety-critical, automotive, industrial, or other high-reliability domains.

• Familiarity with formal verification, emulation, FPGA prototyping, or advanced verification methodologies.

Why Join Us?

• Work on cutting-edge semiconductor technology with a talented and passionate engineering team.

• Help shape verification strategies and directly influence product quality and reliability.

• Work in an international and collaborative engineering environment.

• Receive a competitive compensation and benefits package.

• Benefit from opportunities for professional growth, technical development, and career advancement.

We are an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, national origin, or disability status.

Travel Time:

0% - 25%

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