Senior Design Verification Engineer
๐ง๐ต๐ถ๐ ๐ฟ๐ผ๐น๐ฒ ๐ถ๐ ๐ณ๐ผ๐ฟ ๐ผ๐ป๐ฒ ๐ผ๐ณ ๐๐ต๐ฒ ๐ช๐ฒ๐ฒ๐ธ๐ฑ๐ฎ๐'๐ ๐ฐ๐น๐ถ๐ฒ๐ป๐๐
๐ฆ๐ฎ๐น๐ฎ๐ฟ๐ ๐ฟ๐ฎ๐ป๐ด๐ฒ: ๐ฅ๐ ๐ญ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ - ๐ฅ๐ ๐ญ๐ด๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ (๐ถ๐ฒ ๐๐ก๐ฅ ๐ญ๐ฑ-๐ญ๐ด ๐๐ฃ๐)
Experience: 5+ yrs
Location: Bengaluru, Hyderabad, Telangana, India
Job Type: Full-time
We are looking for an experienced Senior Design Verification Engineer to drive verification activities for CPU and SoC subsystems using industry-standard verification methodologies and tools. The role requires strong hands-on expertise in SystemVerilog, UVM, CPU verification, and ASIC/SoC design verification, with practical experience across modern processor architectures such as RISC-V, ARM, x86, or custom CPU cores.
The ideal candidate will have a strong understanding of CPU architecture, cache coherency, pipeline execution, AMBA protocols, and verification environments, along with the ability to develop robust testbenches, debug complex failures, and contribute to verification strategy and execution.
Requirements
KEY RESPONSIBILITIES
- Develop and execute comprehensive CPU and SoC design verification strategies and test plans.
- Build, enhance, and maintain UVM-based verification environments using SystemVerilog.
- Develop reusable verification components, sequences, scoreboards, monitors, checkers, and coverage models.
- Verify
